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Guan

FPGA-based Digital Convolution for Wireless Applications

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eBook. PDF

eBook

2017

151 S. XVII, 151 p. 128 illus., 61 illus. in color..

In englischer Sprache

Springer International Publishing. ISBN 978-3-319-52000-1

Das Werk ist Teil der Reihe: Springer Series in Wireless Technology

Produktbeschreibung

This book presents essential perspectives on digital convolutions in wireless communications systems and illustrates their corresponding efficient real-time field-programmable gate array (FPGA) implementations. Covering these digital convolutions from basic concept to vivid simulation/illustration, the book is also supplemented with MS PowerPoint presentations to aid in comprehension.

FPGAs or generic all programmable devices will soon become widespread, serving as the "brains" of all types of real-time smart signal processing systems, like smart networks, smart homes and smart cities. The book examines digital convolution by bringing together the following main elements: the fundamental theory behind the mathematical formulae together with corresponding physical phenomena; virtualized algorithm simulation together with benchmark real-time FPGA implementations; and detailed, state-of-the-art case studies on wireless applications, including popular linear convolution in digital front ends (DFEs); nonlinear convolution in digital pre-distortion (DPD) enabled, high-efficiency wireless RF transceivers; and fast linear convolution in massive multiple-input multiple-output (MIMO) systems.

After reading this book, students and professionals will be able to:

· Understand digital convolution with inside-out information: discover what convolution is, why it is important and how it works.

· Enhance their FPGA design skills, i.e., enhance their FPGA-related prototyping capability with model-based hands-on examples.

· Rapidly expand their digital signal processing (DSP) blocks: to examine how to rapidly and efficiently create (DSP) functional blocks on a programmable FPGA chip as a reusable intellectual property (IP) core.

· Upgrade their expertise as both "thinkers" and "doers": minimize/close the gap between mathematical equations and FPGA implementations for existing and emerging wireless applications.

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