Erschienen: 20.12.2004 Abbildung von Gizopoulos / Paschalis / Zorian | Embedded Processor-Based Self-Test | 2004 | 28

Gizopoulos / Paschalis / Zorian

Embedded Processor-Based Self-Test

lieferbar ca. 10 Tage als Sonderdruck ohne Rückgaberecht

ca. 181,85 €

inkl. Mwst.

2004. Buch. xv, 217 S. 29 s/w-Abbildungen, Bibliographien. Hardcover

Springer. ISBN 978-1-4020-2785-7

Format (B x L): 16 x 24 cm

Gewicht: 520 g

In englischer Sprache

Das Werk ist Teil der Reihe: Frontiers in Electronic Testing; 28

Produktbeschreibung

Embedded Processor-Based Self-Test is a guide to self-testing strategies for embedded processors. Embedded processors are regularly used today in most System-on-Chips (SoCs). Testing of microprocessors and embedded processors has always been a challenge because most traditional testing techniques fail when applied to them. This is due to the complex sequential structure of processor architectures, which consists of high performance datapath units and sophisticated control logic for performance optimization. Structured Design-for-Testability (DfT) and hardware-based self-testing techniques, which usually have a non-trivial impact on a circuit’s performance, size and power, can not be applied without serious consideration and careful incorporation into the processor design.

Embedded Processor-Based Self-Test shows how the powerful embedded functionality that processors offer can be utilized as a self-testing resource. Through a discussion of different strategies the book emphasizes on the emerging area of Software-Based Self-Testing (SBST). SBST is based on the idea of execution of embedded software programs to perform self-testing of the processor itself and its surrounding blocks in the SoC. SBST is a low-cost strategy in terms of overhead (area, speed, power), development effort and test application cost, as it is applied using low-cost, low-speed test equipment.

Embedded Processor-Based Self-Test can be used by designers, DfT engineers, test practitioners, researchers and students working on digital testing, and in particular processor and SoC test. This book sets the framework for comparisons among different SBST methodologies by discussing key requirements. It presents successful applications of SBST to a number of embedded processors of different complexities and instruction set architectures.

Gesamtwerk

Die 8. Auflage ist wieder auf sechs Bände angelegt. Darin finden sich übersichtlich und in systematischer Gliederung Vertragsmuster aus der Feder erfahrener Experten. Jedem dieser Muster folgen Anmerkungen, mit denen der dem Vertragsentwurf zu Grunde liegende Sachverhalt und die Gründe für die Wahl des spezifischen Formulars erläutert werden.

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